1. Field of the Invention
The present invention relates to methods of making printed wiring boards and more particularly, to a method of making high density multilayer wiring boards by affixing a plurality of double-sided boards through inter-layer conductive paths or vias.
2. Description of the Related Art
The demand for greater miniaturization of electronic products such as notebook computers, cellular phones, camcorders and the like has presented new challenges for printed circuit board (PCB) makers as more and more high density integrated circuit (IC) chip packages such as ball grid arrays (BGAs) and chip-size packages (CSPs) become more readily available. These chip packages, which contain high-density integrated circuits therewithin, typically have an extremely high number of input/output (I/O) connections. To provide greater surface area for the I/O connections while minimizing the footprint of the packages, these chip packages typically have 2-dimensional arrays of solder bumps disposed on the bottom surface of the packages for I/O connections. Connecting these chip packages to the rest of the circuitry is no easy feat as the number of I/O connections may range anywhere from 170 to 1000 and the pitch, i.e. the center-to-center distance between these I/O connections, may be as small as 0.5 mm.
Consequently, the circuit board must "fan out" the input/output signals of the chips using multiple board layers. Routing such a high number of I/O signals from these chip packages almost always requires that the signal paths be distributed to the lower layers of the boards through "vias," i.e. conductive paths which travel through the thickness of a multilayer wiring board. These vias may extend from a surface layer to an adjacent inner layer (i.e. surface vias), between two adjacent inner layers (i.e. buried vias), or between a top and a bottom surface layer (i.e. through hole vias). However, in a conventional printed wiring board, these vias use up valuable space on the board.
Prior art printed wiring boards made of glass based epoxy resin typically employ through-hole vias to interconnect the inner and outer layers of the boards. The through-hole vias are made by drilling holes through the entire thickness of the multilayer board and then plated with a conductive material. Thus, even if only two inner conductive layers of a six-layer board are to be connected, this board would nevertheless have plated through-holes extending through the six layers of the board. These through-holes are typically about 300 .mu.m in diameter.
Another prior art multilayer wiring board called the "via board" requires the via holes be drilled, one at a time, then plated with a conductive material, and then filled with an insulator. The minimum hole diameter for the vias is also about 300 .mu.m.
Still another prior art multi-layer board is the so-called "build-up board." The build-up board, as the name implies, is constructed through a sequential build up of alternating insulating and conductive layers over a laminated plate, or core board. The insulating layer is made of a photosensitive resin so that holes can be opened up during the photolithography process to form vias. However, to connect the top and bottom surface layers of the build-up board, a through hole must still be drilled through the core board. The diameter of the vias of build-up boards is about 100-150 .mu.m, which is about half the size of the through-holes in a conventional printed wiring board. The cost associated with build-up boards is quite high and has not yet gained wide acceptance by PCB makers.